完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Chiu, Yu-Chien | en_US |
dc.contributor.author | Cheng, Chun-Hu | en_US |
dc.contributor.author | Liou, Guan-Lin | en_US |
dc.contributor.author | Chang, Chun-Yen | en_US |
dc.date.accessioned | 2018-08-21T05:54:21Z | - |
dc.date.available | 2018-08-21T05:54:21Z | - |
dc.date.issued | 2017-08-01 | en_US |
dc.identifier.issn | 0018-9383 | en_US |
dc.identifier.uri | http://dx.doi.org/10.1109/TED.2017.2712709 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/145832 | - |
dc.description.abstract | In this brief, we reported a ferroelectric versatile memory with strained-gate engineering. The versatile memory with high-strain-gate showed a >40% improvement on ferroelectric hysteresis window, compared to low-strain case. The high compressive stress induced from high nitrogen-content TaN enhances monoclinic-to-orthorhombic phase transition to reach stronger ferrolectric polarization and lower depolarization field. The versatile memory featuring ferroelectric negative capacitance exhibited excellent transfer characteristics of the sub-60-mVdec subthreshold swing, ultralow off-state leakage of <1fA/mu m and > 108 on/off current ratio. Furthermore, the ferroelectric versatile memory can be switched by +/- 5 V under 20-ns speed for a long endurance cycling (similar to 10(12) cycles). The low-power operation can be ascribed to the amplification of the surface potential to reach the strong inversion and fast domain polarization at the correspondingly low program/erase voltages. | en_US |
dc.language.iso | en_US | en_US |
dc.subject | Charge trpapping | en_US |
dc.subject | ferroelectric | en_US |
dc.subject | multilevel | en_US |
dc.subject | nonvolatile memory | en_US |
dc.title | Energy-Efficient Versatile Memories With Ferroelectric Negative Capacitance by Gate-Strain Enhancement | en_US |
dc.type | Article | en_US |
dc.identifier.doi | 10.1109/TED.2017.2712709 | en_US |
dc.identifier.journal | IEEE TRANSACTIONS ON ELECTRON DEVICES | en_US |
dc.citation.volume | 64 | en_US |
dc.citation.spage | 3498 | en_US |
dc.citation.epage | 3501 | en_US |
dc.contributor.department | 電子工程學系及電子研究所 | zh_TW |
dc.contributor.department | Department of Electronics Engineering and Institute of Electronics | en_US |
dc.identifier.wosnumber | WOS:000406268900067 | en_US |
顯示於類別: | 期刊論文 |