标题: | Simultaneous Functional and Timing ECO |
作者: | Chang, Hua-Yu Jiang, Iris Hui-Ru Chang, Yao-Wen 电子工程学系及电子研究所 Department of Electronics Engineering and Institute of Electronics |
关键字: | Engineering change order;technology remapping;spare cells |
公开日期: | 1-一月-2011 |
摘要: | Metal-only ECO is prevalent at design houses to perform incremental design changes to resolve last found functional and/or timing failures. However, it is hard to perform mixed functional and timing changes manually. Prior endeavors focus on functional or timing ECO alone, but we observe that separating them may fail to fix all timing violations. Consequently, this paper presents the first work to perform simultaneous functional and timing ECO. We use an augmented bipartite graph to model both types of ECO. In addition, through comprehensive constant insertion and bridging, the functional capability of each spare cell is enhanced, thus facilitating spare cell selection. Experimental results show that our simultaneous functional and timing ECO engine can successfully resolve mixed functional and timing ECO that is unsolvable by the sequential scheme. Moreover, our engine outperforms the state-of-the-art works for timing ECO with a 117X speedup, and for functional ECO with 6-15% wirelength reductions. |
URI: | http://hdl.handle.net/11536/146310 |
ISSN: | 0738-100X |
期刊: | PROCEEDINGS OF THE 48TH ACM/EDAC/IEEE DESIGN AUTOMATION CONFERENCE (DAC) |
起始页: | 140 |
结束页: | 145 |
显示于类别: | Conferences Paper |