標題: | Design Space Exploration Considering Back-Gate Biasing Effects for Negative-Capacitance Transition-Metal-Dichalcogenide (TMD) Field-Effect Transistors |
作者: | You, Wei-Xiang Su, Pin 電子工程學系及電子研究所 Department of Electronics Engineering and Institute of Electronics |
關鍵字: | Negative-capacitance FET;2D material;transition-metal-dichalcogenide |
公開日期: | 1-一月-2017 |
摘要: | In this work, with the aid of an analytical and scalable model, we explore the design space for negative-capacitance (NC) FETs with a 2D semiconducting transition-metal-dichalcogenide (TMD) channel with emphasis on the impact of back-gate biasing. Our study indicates that, to mitigate the conflict between subthreshold swing (SS) and hysteresis and to maximize the design space for the NC-TMDFET, a thin buried oxide (BOX) and an adequate reverse back-gate bias can be applied to achieve the optimum design. |
URI: | http://hdl.handle.net/11536/146765 |
期刊: | 2017 IEEE ELECTRON DEVICES TECHNOLOGY AND MANUFACTURING CONFERENCE (EDTM) |
起始頁: | 136 |
結束頁: | 137 |
顯示於類別: | 會議論文 |