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dc.contributor.authorDai, C. -T.en_US
dc.contributor.authorChen, S. -H.en_US
dc.contributor.authorLinten, D.en_US
dc.contributor.authorScholz, M.en_US
dc.contributor.authorHellings, G.en_US
dc.contributor.authorBoschke, R.en_US
dc.contributor.authorKarp, J.en_US
dc.contributor.authorHart, M.en_US
dc.contributor.authorGroeseneken, G.en_US
dc.contributor.authorKer, M. -D.en_US
dc.contributor.authorMocuta, A.en_US
dc.contributor.authorHoriguchi, N.en_US
dc.date.accessioned2018-08-21T05:56:56Z-
dc.date.available2018-08-21T05:56:56Z-
dc.date.issued2017-01-01en_US
dc.identifier.issn1541-7026en_US
dc.identifier.urihttp://hdl.handle.net/11536/146847-
dc.description.abstractLatchup (LU) had been considered to be less important in advanced CMOS technologies. However, I/O interface and analog applications can still operate at high voltage (e.g., 1.8V or 3.3V) in sub-20nm bulk FinFET technologies. LU threats are never eliminated and the sensitivity towards LU is increased in bulk FinFET technology.en_US
dc.language.isoen_USen_US
dc.subjectLatchupen_US
dc.subjectbulk FinFETen_US
dc.subjectsilicon control rectifier (SCR)en_US
dc.titleLatchup in Bulk FinFET Technologyen_US
dc.typeProceedings Paperen_US
dc.identifier.journal2017 IEEE INTERNATIONAL RELIABILITY PHYSICS SYMPOSIUM (IRPS)en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000416068500116en_US
Appears in Collections:Conferences Paper


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