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dc.contributor.authorWang, Zhuo-Ruien_US
dc.contributor.authorLi, Yien_US
dc.contributor.authorSu, Yu-Tingen_US
dc.contributor.authorZhou, Ya-Xiongen_US
dc.contributor.authorCheng, Longen_US
dc.contributor.authorChang, Ting-Changen_US
dc.contributor.authorXue, Kan-Haoen_US
dc.contributor.authorSze, Simon M.en_US
dc.contributor.authorMiao, Xiang-Shuien_US
dc.date.accessioned2019-04-02T06:00:47Z-
dc.date.available2019-04-02T06:00:47Z-
dc.date.issued2018-10-01en_US
dc.identifier.issn0018-9383en_US
dc.identifier.urihttp://dx.doi.org/10.1109/TED.2018.2866048en_US
dc.identifier.urihttp://hdl.handle.net/11536/148192-
dc.description.abstractIn-memory computing architecture is an emerging revolutionary computing paradigm that can break the von Neumann bottleneck. Computing methodology and circuit codesign using the CMOS compatible 1T1R resistive random access memory (RRAM) integration structure is presented in this paper. Functionally complete Boolean logic and arithmetic functions are experimentally demonstrated. With a single 40-nm CMOS process 1T1R unit, each of the 16 binary logics can be realized in two logic steps with an additional readout step for cascading, which shows functional reconfiguration and low computational complexity. Up to 10(7) cycles of NAND and XOR logic operations are performed to validate the correctness and reliability. Moreover, several fundamental adder circuits are designed and experimentally demonstrated in 1T1R devices as the proof of concept of the 1T1R computing architecture. The adders proposed in this paper include a ripple-carry adder and its optimized design and a carry-select adder, which all show promising advantages in nonvolatility, computation speed, and circuit area. This paper reports the most complex yet efficient RRAM-based 8-bit addition function experimentally so far and lays a solid foundation for constructing the future in-memory computing architecture.en_US
dc.language.isoen_USen_US
dc.subject1T1Ren_US
dc.subject8-bit adderen_US
dc.subjectBoolean logicen_US
dc.subjectin-memory computingen_US
dc.subjectresistive random access memory (RRAM)en_US
dc.titleEfficient Implementation of Boolean and Full-Adder Functions With 1T1R RRAMs for Beyond Von Neumann In-Memory Computingen_US
dc.typeArticleen_US
dc.identifier.doi10.1109/TED.2018.2866048en_US
dc.identifier.journalIEEE TRANSACTIONS ON ELECTRON DEVICESen_US
dc.citation.volume65en_US
dc.citation.spage4659en_US
dc.citation.epage4666en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000445239700087en_US
dc.citation.woscount1en_US
Appears in Collections:Articles