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dc.contributor.authorLin, CWen_US
dc.contributor.authorChang, CYen_US
dc.date.accessioned2019-04-02T06:00:00Z-
dc.date.available2019-04-02T06:00:00Z-
dc.date.issued1997-04-01en_US
dc.identifier.issn0021-4922en_US
dc.identifier.urihttp://dx.doi.org/10.1143/JJAP.36.2032en_US
dc.identifier.urihttp://hdl.handle.net/11536/149516-
dc.description.abstractA novel device structure consisting of conventional hydrogenated amorphous silicon (a-Si:H) for the source and drain and of hydrogenated microcrystalline soilicon (mu c-Si:H) for the channel region which can improve the performance of thin-film transistors (TFTs) has been proposed and fabricated. Undoped a-Si:H serves as a blocking layer to suppress the OFF-state current in the drain region which is comparable to that of conventional a-Si:H TFT with a much higher drivability. The fabrication process is simple and inexpensive e with the possibility of high reliability.en_US
dc.language.isoen_USen_US
dc.subjectamorphous siliconen_US
dc.subjectmicrocrystalline siliconen_US
dc.subjectvertical offseten_US
dc.subjecttransfer characteristicsen_US
dc.subjectthin film transistoren_US
dc.titleA novel thin-film transistor with vertical offset structureen_US
dc.typeArticleen_US
dc.identifier.doi10.1143/JJAP.36.2032en_US
dc.identifier.journalJAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS SHORT NOTES & REVIEW PAPERSen_US
dc.citation.volume36en_US
dc.citation.spage2032en_US
dc.citation.epage2043en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:A1997WY79900009en_US
dc.citation.woscount4en_US
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