標題: High Performance of Ge nMOSFETs Using SiO2 Interfacial Layer and TiLaO Gate Dielectric
作者: Chen, W. B.
Chin, Albert
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
關鍵字: Ge;nMOSFETs;TaN;TiLaO
公開日期: 1-一月-2010
摘要: Using a SiO2 interfacial layer and a high-kappa gate TiLaO dielectric, the TaN/TiLaO/SiO2 on Ge/Si nMOSFETs in this study showed a small 1.1-nm capacitance equivalent thickness, a good high field mobility of 201 cm(2)/(V . s) at 0.5 MV/cm, and a very low OFF-state leakage current of 3.5 x 10(-10) A/mu m. The self-aligned and gate-first metal-gate/high-kappa and Ge nMOSFETs were processed using standard ion implantation and 550 degrees C RTA. The proposed devices are fully compatible with current VLSI fabrication methods.
URI: http://dx.doi.org/10.1109/LED.2009.2035719
http://hdl.handle.net/11536/149867
ISSN: 0741-3106
DOI: 10.1109/LED.2009.2035719
期刊: IEEE ELECTRON DEVICE LETTERS
Volume: 31
起始頁: 80
結束頁: 82
顯示於類別:期刊論文