Gate-First TaN/La2O3/SiO2/Ge n-MOSFETs Using Laser Annealing

doi:10.1109/LED.2010.2063692

完整後設資料紀錄

DC 欄位	值	語言
dc.contributor.author	Chen, W. B.	en_US
dc.contributor.author	Wu, C. H.	en_US
dc.contributor.author	Shie, B. S.	en_US
dc.contributor.author	Chin, Albert	en_US
dc.date.accessioned	2019-04-02T06:00:27Z	-
dc.date.available	2019-04-02T06:00:27Z	-
dc.date.issued	2010-11-01	en_US
dc.identifier.issn	0741-3106	en_US
dc.identifier.uri	http://dx.doi.org/10.1109/LED.2010.2063692	en_US
dc.identifier.uri	http://hdl.handle.net/11536/150112	-
dc.description.abstract	To improve device performance, laser annealing was applied to Ge n-MOSFETs, which gave a low sheet resistance of 68 Omega/sq, a small ideality factor of 1.3, and a large similar to 10(5) forward\reverse current in the source-drain n(+)/p junction. The laser-annealed gate-first TaN/La2O3/SiO2/Ge n-MOSFETs showed a high mobility of 603 cm(2)/Vs and a good mobility of 304 cm(2)/Vs at a 1.9-nm equivalent oxide thickness.	en_US
dc.language.iso	en_US	en_US
dc.subject	Ge	en_US
dc.subject	high-kappa gate dielectric	en_US
dc.subject	laser annealing	en_US
dc.title	Gate-First TaN/La2O3/SiO2/Ge n-MOSFETs Using Laser Annealing	en_US
dc.type	Article	en_US
dc.identifier.doi	10.1109/LED.2010.2063692	en_US
dc.identifier.journal	IEEE ELECTRON DEVICE LETTERS	en_US
dc.citation.volume	31	en_US
dc.citation.spage	1184	en_US
dc.citation.epage	1186	en_US
dc.contributor.department	電子工程學系及電子研究所	zh_TW
dc.contributor.department	Department of Electronics Engineering and Institute of Electronics	en_US
dc.identifier.wosnumber	WOS:000283448300004	en_US
dc.citation.woscount	6	en_US
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