完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Kuan, Chin-I | en_US |
dc.contributor.author | Peng, Kang-Ping | en_US |
dc.contributor.author | Lin, Horng-Chih | en_US |
dc.contributor.author | Li, Pei-Wen | en_US |
dc.date.accessioned | 2019-04-02T06:04:21Z | - |
dc.date.available | 2019-04-02T06:04:21Z | - |
dc.date.issued | 2018-01-01 | en_US |
dc.identifier.issn | 1930-8868 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/150742 | - |
dc.description.abstract | The inclusion of an ultra-thin zinc oxynitride (ZnON) layer inserted between the channel of InGaZnO (IGZO) and source/drain (S/D) metal of Al for an IGZO thin-film transistor (TFT) is demonstrated to improve device performance in terms of a reduction in S/D series resistance (RSD). The improvement is attributable to the elimination of an interfacial layer of AlOx which is inherently formed at the Al/IGZO interface, by the insertion of ZnON. Characteristics of 3D stacked-type inverters constructed by the IGZO TFTs with ZnON contacts have been also studied. Full-swing switching with voltage gains increases from 9.8V/V for the IGZO inverter without ZnON contacts to 12.3 V/V with ZnON contacts at an operating voltage of 5 V. | en_US |
dc.language.iso | en_US | en_US |
dc.title | ZnON Contacts Enabling High-performance 3-D InGaZnO Inverters | en_US |
dc.type | Proceedings Paper | en_US |
dc.identifier.journal | 2018 INTERNATIONAL SYMPOSIUM ON VLSI TECHNOLOGY, SYSTEMS AND APPLICATION (VLSI-TSA) | en_US |
dc.contributor.department | 電子工程學系及電子研究所 | zh_TW |
dc.contributor.department | Department of Electronics Engineering and Institute of Electronics | en_US |
dc.identifier.wosnumber | WOS:000444900700009 | en_US |
dc.citation.woscount | 0 | en_US |
顯示於類別: | 會議論文 |