Title: ESD Protection Design with Low-Leakage Consideration for Silicon Chips of IoT Applications
Authors: Ker, Ming-Don
Lin, Chun-Yu
Wu, Yi-Han
Wang, Wen-Tai
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
Keywords: CMOS;electrostatic discharge (ESD);ESD protection;low-leakage
Issue Date: 1-Jan-2017
Abstract: On-chip electrostatic discharge (ESD) protection design with low-leakage consideration for the silicon chips of IoT applications is presented. The proposed ESD protection design uses the fast turn-on silicon-controlled rectifier (SCR) device to implement the power-rail ESD clamp circuit. Experimental results verified in TSMC 28nm CMOS process have shown that the proposed design has advantages of low leakage current (2 similar to 3nA), low trigger voltage (similar to 2V), high ESD robustness (>8kV), and free to latchup issue.
URI: http://hdl.handle.net/11536/150781
ISSN: 2379-7711
Journal: 2017 IEEE 7TH ANNUAL INTERNATIONAL CONFERENCE ON CYBER TECHNOLOGY IN AUTOMATION, CONTROL, AND INTELLIGENT SYSTEMS (CYBER)
Begin Page: 1496
End Page: 1499
Appears in Collections:Conferences Paper