A 2x2-16x16 Reconfigurable GGMD Processor for MIMO Communication Systems

Abstract

The generalized geometric mean decomposition (GGMD) is a recently proposed matrix decomposition which can be viewed as a computationally efficient counterpart of the conventional geometric mean decomposition (GMD). As the GMD is the core algorithm in many high performance precoders and equalizers such as the Tomlinson-Harashima precoder and decision feedback equalizer, GGMD facilitates a more computationally efficient implementation while exhibiting identical performance. This work presents the first GGMD processor in the open literature, supporting various matrix sizes by leveraging the reconfigurable processing element (PE) using coordinate rotation digital computers (CORDICs). The implemented GGMD processor supports matrix sizes of 2(n) which ranges from 2 x 2 to 16 x 16, and the throughput performance is maximized through a PE array architecture. The chip integrates 326.9K gates in an area of 1.65 mm(2) in a 90-nm CMOS technology with the maximum throughput achieving 450K matrices/sec for a 16 x 16 matrix at 125 MHz. It dissipates 20.7-28.5 mW at 125 MHz from a 1V supply. Compared to previous GMD designs, this work supports a larger MIMO system with lower hardware complexity and power consumption.