標題: Chimney-shaped and plateau-shaped gate electrode field emission arrays
作者: Tarntair, FG
Wang, CC
Hong, WK
Huang, HK
Cheng, HC
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
公開日期: 1-一月-1998
摘要: A triode structure of chimney-shaped field emitter arrays is proposed in this article. This triode structure includes the chimney-shaped emitter, thermal oxidation dioxide, and the plateau-shaped singlecrystalline silicon gate electrode. For the application of the matrix-addressable and large area flat panel display, the uniform structure of the emitters and the yield become critical manufacturing issues when attempting to control nano-meter size features. The uniformity and yield of the chimney-shaped emitters are very well controlled. The nano-sized gate-to-emitter separations can be created by the changing thickness of the insulator. The uniformity of the insulator and emitter material can be controlled within 3% which can be obtained by most large area thin film deposition tools, not by photolithography.
URI: http://dx.doi.org/10.1557/PROC-509-15
http://hdl.handle.net/11536/150946
ISSN: 0272-9172
DOI: 10.1557/PROC-509-15
期刊: MATERIALS ISSUES IN VACUUM MICROELECTRONICS
Volume: 509
起始頁: 15
結束頁: 20
顯示於類別:會議論文