完整後設資料紀錄
DC 欄位語言
dc.contributor.authorLi, Zhen-Haoen_US
dc.contributor.authorKuo, Po-Yien_US
dc.contributor.authorChen, Wen-Tzuen_US
dc.contributor.authorLiu, Po-Tsunen_US
dc.date.accessioned2019-04-02T06:04:16Z-
dc.date.available2019-04-02T06:04:16Z-
dc.date.issued2018-01-01en_US
dc.identifier.issn1938-5862en_US
dc.identifier.urihttp://dx.doi.org/10.1149/08611.0111ecsten_US
dc.identifier.urihttp://hdl.handle.net/11536/150989-
dc.description.abstractThe thin-film transistors (TFTs) with back-channel etched (BCE) type enable channel length to be narrow and reduce parasitic capacitances owing to its shorter overlaps between the gate and source/drain (S/D) electrodes. In this study, a high-performance BCE-type oxide thin-film transistor was proposed for investigation. A novel stacked double layer In-W-O (IWO) / In-W-Zn-O (IWZO) channel structure was fabricated and developed. Respectively, IWZO exhibits a high resistance to back-channel etching damage and IWO channel achieve a high mobility. The double layer IWO/IWZO TFTs are promising candidates for driving active matrix organic light-emitting diode (AMOLED) and high resolution display applications in the future. The double layer IWO/IWZO TFTs with S/D pattern by H2O2 + KOH can exhibit the high-performance electrical characteristic. The field-effect mobility (mu FE) similar to 21.1cm(2)/V-s, subthreshold swing (S.S.) similar to 0.15 V/dec., threshold voltage (V-TH) similar to -0.092 V, and on/off ratio similar to 4.88x10(8) can be achieved.en_US
dc.language.isoen_USen_US
dc.titleBack-Channel Etched Double Layer In-W-O/In-W-Zn-O Thin-Film Transistorsen_US
dc.typeProceedings Paperen_US
dc.identifier.doi10.1149/08611.0111ecsten_US
dc.identifier.journalTHIN FILM TRANSISTOR TECHNOLOGIES 14 (TFTT 14)en_US
dc.citation.volume86en_US
dc.citation.spage111en_US
dc.citation.epage114en_US
dc.contributor.department光電工程學系zh_TW
dc.contributor.departmentDepartment of Photonicsen_US
dc.identifier.wosnumberWOS:000456373300012en_US
dc.citation.woscount0en_US
顯示於類別:會議論文