完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Wu, You-Lin | en_US |
dc.contributor.author | Lin, Shi-Tin | en_US |
dc.contributor.author | Yang, Chang Cheng | en_US |
dc.contributor.author | Wu, Chien-Hung | en_US |
dc.contributor.author | Chin, Albert | en_US |
dc.date.accessioned | 2019-04-02T06:04:44Z | - |
dc.date.available | 2019-04-02T06:04:44Z | - |
dc.date.issued | 2007-01-01 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/151091 | - |
dc.description.abstract | In this work, we present the comparison of hysteresis behaviors of HfAlON and HfSiON high-k dielectrics at low-temperature and subjected to constant voltage stress (CVS). The V-FB instability in the HfAlON and HfSiON gate dielectric were deeply studied. A model is proposed to explain the V-FB Shift and hysteresis direction in thus two samples. We also treat the CVS voltage and CVS time dependence of hysteresis and V-FB Shift. The decreasing hysteresis with temperature is ascribed to traps generation/recombination rate reduction at low temperature. | en_US |
dc.language.iso | en_US | en_US |
dc.title | Study of low-temperature and post-stress hysteresis in high-k gate dielectrics | en_US |
dc.type | Proceedings Paper | en_US |
dc.identifier.journal | EDSSC: 2007 IEEE INTERNATIONAL CONFERENCE ON ELECTRON DEVICES AND SOLID-STATE CIRCUITS, VOLS 1 AND 2, PROCEEDINGS | en_US |
dc.citation.spage | 653 | en_US |
dc.contributor.department | 電子工程學系及電子研究所 | zh_TW |
dc.contributor.department | Department of Electronics Engineering and Institute of Electronics | en_US |
dc.identifier.wosnumber | WOS:000254170700164 | en_US |
dc.citation.woscount | 1 | en_US |
顯示於類別: | 會議論文 |