完整後設資料紀錄
DC 欄位語言
dc.contributor.authorWu, You-Linen_US
dc.contributor.authorLin, Shi-Tinen_US
dc.contributor.authorYang, Chang Chengen_US
dc.contributor.authorWu, Chien-Hungen_US
dc.contributor.authorChin, Alberten_US
dc.date.accessioned2019-04-02T06:04:44Z-
dc.date.available2019-04-02T06:04:44Z-
dc.date.issued2007-01-01en_US
dc.identifier.urihttp://hdl.handle.net/11536/151091-
dc.description.abstractIn this work, we present the comparison of hysteresis behaviors of HfAlON and HfSiON high-k dielectrics at low-temperature and subjected to constant voltage stress (CVS). The V-FB instability in the HfAlON and HfSiON gate dielectric were deeply studied. A model is proposed to explain the V-FB Shift and hysteresis direction in thus two samples. We also treat the CVS voltage and CVS time dependence of hysteresis and V-FB Shift. The decreasing hysteresis with temperature is ascribed to traps generation/recombination rate reduction at low temperature.en_US
dc.language.isoen_USen_US
dc.titleStudy of low-temperature and post-stress hysteresis in high-k gate dielectricsen_US
dc.typeProceedings Paperen_US
dc.identifier.journalEDSSC: 2007 IEEE INTERNATIONAL CONFERENCE ON ELECTRON DEVICES AND SOLID-STATE CIRCUITS, VOLS 1 AND 2, PROCEEDINGSen_US
dc.citation.spage653en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000254170700164en_US
dc.citation.woscount1en_US
顯示於類別:會議論文