標題: 0.4V Reconfigurable Near-Threshold TCAM in 28nm High-k Metal-Gate CMOS Process
作者: Chan, Yun-Sheng
Huang, Po-Tsang
Wu, Shang-Lin
Lung, Sheng-Chi
Wang, Wei-Chang
Hwang, Wei
Chuang, Ching-Te
電子工程學系及電子研究所
國際半導體學院
Department of Electronics Engineering and Institute of Electronics
International College of Semiconductor Technology
關鍵字: TCAM;near-threshold;low-voltage;SRAM mini array
公開日期: 1-Jan-2018
摘要: This paper presents a near-threshold configurable ternary content addressable memory (TCAM) design for energy-constrained neural network or software-defined network (SDN) applications. A TCAM architecture based on foundry-based 6T SRAM mini-array improves area efficiency and minimizes disturbs to enable operation down to 0.4V, and provides configurable lookup tables for users. To minimize dynamic power consumption, hierarchical precharge structure (HPRE) and don't-care based ripple search-line scheme are utilized for decreasing both the switching activities and wire capacitance. Moreover, power-gating technique, self-timed control and V-trip-tracking write-assist are used to reduce standby power, speed-up propagation delays of global signals and improve write-ability at low voltage, respectively. A reconfigurable TCAM is implemented using UMC 28nm high-k metal gate (HKMG) CMOS process. The design achieves operating frequency of 240MHz (20MHz) with energy consumption of 1.146 (0.621) fJ/bit/search at 0.9V (0.4V).
URI: http://hdl.handle.net/11536/151725
ISBN: 978-1-5386-1491-4
ISSN: 2163-9612
期刊: 2018 31ST IEEE INTERNATIONAL SYSTEM-ON-CHIP CONFERENCE (SOCC)
起始頁: 272
結束頁: 277
Appears in Collections:Conferences Paper