標題: | Analysis of wide-IF-band 65 nm-CMOS mixer for 77-110 GHz radio-astronomical receiver design |
作者: | Huang, Ching-Ying Wu, Kun-Long Hu, Robert Chang, Chi-Yang 電子工程學系及電子研究所 Department of Electronics Engineering and Institute of Electronics |
關鍵字: | field effect MIMIC;radio receivers;CMOS integrated circuits;millimetre wave receivers;low noise amplifiers;mixers (circuits);radioastronomical techniques;W-band receiver;RF-LNA;wideband mixer;LO tripler;driving amplifier;dual-modulation conversion-matrix method;channel-conductance modulation;IF amplifier;high-impedance artificial transmission line;actively biased mixer;radio-astronomical receiver;CMOS receiver;wide-IF-band CMOS mixer;IF amplification;mixing transistor drain bias;loading impedance;LO-induced transconductance modulation;frequency 77;0 GHz to 110;0 GHz;size 65;0 nm;noise figure 20;0 dB;frequency 33;0 GHz;power 330;0 mW;voltage 1;3 V;gain 10;0 dB |
公開日期: | 1-五月-2019 |
摘要: | This manuscript presents the design of a W-band receiver in which an radio frequency-low noise amplifier (RF-LNA), a wideband mixer, intermediate frequency (IF) amplification, a local oscillator frequency (LO) tripler and a driving amplifier are all integrated into one single chip of 1050 x 820 mu m(2). To effectively extend the mixer's IF bandwidth while retaining its conversion gain, impacts of the mixing transistor's drain bias and output loading impedance are explored using a dual-modulation conversion-matrix method, which allows both the LO-induced transconductance modulation and channel-conductance modulation to be considered simultaneously. It is shown that, by merging the input capacitance of the IF amplifier into a high-impedance artificial transmission line, an actively biased mixer can have constant conversion gain over broad bandwidth. A 77-110 GHz 65 nm-complementary metal-oxide-semiconductor (CMOS) receiver with 33 GHz IF bandwidth is then designed and measured. Its conversion gain and noise figure are 10 and 20 dB, respectively, and the input-referred P1 dB is -15 dBm; the overall power consumption is 330 mW under 1.3 V drain bias. |
URI: | http://dx.doi.org/10.1049/iet-cds.2018.5269 http://hdl.handle.net/11536/152277 |
ISSN: | 1751-858X |
DOI: | 10.1049/iet-cds.2018.5269 |
期刊: | IET CIRCUITS DEVICES & SYSTEMS |
Volume: | 13 |
Issue: | 3 |
起始頁: | 406 |
結束頁: | 413 |
顯示於類別: | 期刊論文 |