標題: | Area-Efficient On-Chip Transient Detection Circuit for System-Level ESD Protection Against Transient-Induced Malfunction |
作者: | Chen, Wen-Chieh Ker, Ming-Dou 電子工程學系及電子研究所 Department of Electronics Engineering and Institute of Electronics |
關鍵字: | Electrostatic discharge (ESD);system-level ESD;electromagnetic compatibility (EMC);transient detection circuit |
公開日期: | 1-六月-2019 |
摘要: | A new on-chip transient detection circuit with superior area efficiency is proposed against the system malfunction resulting from system-level electrostatic discharge ( ESD) events. With dual-latched structure, a better area efficiency can be achieved by the reduced time constant inquiry. The proposed transient detection circuit with a silicon area of 40 mu m x 60 mu m has been fabricated in a 0.18-mu m CMOS process with 1.8-V devices. The detection sensitivity has been successfully verified under +/- 200 V system-level ESD tests. To achieve the "Class B" specification of IEC 61000-4-2 standard, the proposed transient detection circuit serves as a safety guard for the system. Through the hardware/firmware co-design, the auto-recovery procedure can be activated by the proposed transient detection circuit sending out a warning signal. With the proposed transient detection circuit co-works with the system program, the immunity level of microelectronic products against the electromagnetic compatibility (EMC) of ESD events can be effectively improved. |
URI: | http://dx.doi.org/10.1109/TDMR.2019.2910351 http://hdl.handle.net/11536/152303 |
ISSN: | 1530-4388 |
DOI: | 10.1109/TDMR.2019.2910351 |
期刊: | IEEE TRANSACTIONS ON DEVICE AND MATERIALS RELIABILITY |
Volume: | 19 |
Issue: | 2 |
起始頁: | 363 |
結束頁: | 369 |
顯示於類別: | 期刊論文 |