標題: Vertical GaN-on-GaN PIN diodes fabricated on free-standing GaN wafer using an ammonothermal method
作者: Chen, Sung-Wen Huang
Wang, Hao-Yu
Hu, Cong
Chen, Yong
Wang, Hao
Wang, Jiale
He, Wei
Sun, Xiaojuan
Chiu, Hsien-Chin
Kuo, Hao-Chung
Wang, Weicong
Xu, Ke
Li, Dabing
Liu, Xinke
光電工程學系
光電工程研究所
Department of Photonics
Institute of EO Enginerring
關鍵字: Free standing gallium nitride (GaN);GaN-On-GaN;Power PIN diode
公開日期: 5-Oct-2019
摘要: We report vertical GaN-on-GaN PIN diodes with a record high figure-of-merit (V-BR(2)/R-on) of 29.7 GW/cm(2) on free-standing GaN wafer using a complementary metal-oxide-semiconductor (CMOS) compatible contact materials. Due to the low substrate resistivity, low contact resistance, and high quality of GaN drift layer, a low on-state resistance R(on )of 0.31 m Omega cm(2) is obtained. With integrating of the metal filed plate structure in the vertical device, the peak electrical field along the GaN mesa edge can be significantly reduced, thus leading to a high breakdown voltage V-BR of 3.04 kV. The vertical GaN-on-GaN PIN diodes in this work show turn-on voltage V-on of similar to 3.4 V, on/off current ratio of similar to 1.3 x 10(7), and ideal factor n of similar to 2.2. According to the reverse switching measurement, the reverse recovery time T-rr. (reverse recovery charge Q(rr)) is 22.8 ns (4.8 nC) and 24.0 ns (5.4 nC), respectively, under a testing temperature of 300 K and 500 K. (C) 2019 Elsevier B.V. All rights reserved.
URI: http://dx.doi.org/10.1016/j.jallcom.2019.07.021
http://hdl.handle.net/11536/152709
ISSN: 0925-8388
DOI: 10.1016/j.jallcom.2019.07.021
期刊: JOURNAL OF ALLOYS AND COMPOUNDS
Volume: 804
起始頁: 435
結束頁: 440
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