標題: | Electrostatic Integrity in Negative-Capacitance FETs - A Subthreshold Modeling Approach |
作者: | Su, Pin You, Wei-Xiang 電子工程學系及電子研究所 Department of Electronics Engineering and Institute of Electronics |
公開日期: | 1-一月-2019 |
摘要: | Using an analytical subthreshold potential model, this paper shows that the negative-capacitance FinFET (NC-FinFET) inherently possesses a superior electrostatic integrity than the baseline FinFET. Taking into account the spacer induced distributed charges in our subthreshold model, we demonstrate that an adequate spacer design can be utilized to further enhance the NC effect and the electrostatic integrity for NC-FinFETs. This may serve as a way to extend the FinFET scaling. |
URI: | http://hdl.handle.net/11536/155246 |
ISBN: | 978-1-7281-4031-5 |
ISSN: | 2380-9248 |
期刊: | 2019 IEEE INTERNATIONAL ELECTRON DEVICES MEETING (IEDM) |
起始頁: | 0 |
結束頁: | 0 |
顯示於類別: | 會議論文 |