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dc.contributor.authorHuang, Shao-Changen_US
dc.contributor.authorChen, Ke-Horngen_US
dc.contributor.authorLin, Wei-Yaoen_US
dc.contributor.authorLee, Zon-Lonen_US
dc.contributor.authorChang, Kun-Weien_US
dc.contributor.authorHsu, Ericaen_US
dc.contributor.authorLee, Wensonen_US
dc.contributor.authorChen, Lin-Fwuen_US
dc.contributor.authorLu, Chrisen_US
dc.date.accessioned2014-12-08T15:22:17Z-
dc.date.available2014-12-08T15:22:17Z-
dc.date.issued2012-04-01en_US
dc.identifier.issn1063-8210en_US
dc.identifier.urihttp://dx.doi.org/10.1109/TVLSI.2011.2106808en_US
dc.identifier.urihttp://hdl.handle.net/11536/15776-
dc.description.abstractAn additional high-voltage pad is generally applied for one-time-programming (OTP) memory product applications. This may increase the complexity of input/output (I/O) pad arrangement and the area penalty. In this paper, a novel approach of I/O circuit embedded with the power-switch function is proposed for multifunction integrations in one I/O pad. The capabilities of high-voltage programming, I/O signal handling, electrostatic discharge protection and latch-up prevention for this novel circuit are well examined from silicon verifications.en_US
dc.language.isoen_USen_US
dc.subjectElectrostatic discharge (ESD)en_US
dc.subjectNeobiten_US
dc.subjectone-time programming (OTP)en_US
dc.titleEmbedded I/O PAD Circuit Design for OTP Memory Power-Switch Functionalityen_US
dc.typeArticleen_US
dc.identifier.doi10.1109/TVLSI.2011.2106808en_US
dc.identifier.journalIEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMSen_US
dc.citation.volume20en_US
dc.citation.issue4en_US
dc.citation.spage746en_US
dc.citation.epage750en_US
dc.contributor.department電控工程研究所zh_TW
dc.contributor.departmentInstitute of Electrical and Control Engineeringen_US
dc.identifier.wosnumberWOS:000302085300016-
dc.citation.woscount0-
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