Full metadata record
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Han, Ming-Hung | en_US |
dc.contributor.author | Chen, Hung-Bin | en_US |
dc.contributor.author | Chang, Chia-Jung | en_US |
dc.contributor.author | Wu, Jia-Jiun | en_US |
dc.contributor.author | Chen, Wen-Chong | en_US |
dc.contributor.author | Tsai, Chi-Chong | en_US |
dc.contributor.author | Chang, Chun-Yen | en_US |
dc.date.accessioned | 2014-12-08T15:23:18Z | - |
dc.date.available | 2014-12-08T15:23:18Z | - |
dc.date.issued | 2012-04-01 | en_US |
dc.identifier.issn | 0021-4922 | en_US |
dc.identifier.uri | http://dx.doi.org/04DP04 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/16354 | - |
dc.description.abstract | In this work, double reduced surface field (RESURF) laterally diffused metal oxide semiconductor (LDMOS) device combines a new implant technology without using additional mask in standard 0.18 mu m technology has been proposed and successfully fabricated. The breakdown voltage (BV) can be improved significantly with simply changing the implanted region length in this implant technology. Firstly, hydrodynamic transport simulations which analyze the high bias condition electric field distributions are examined to predict and explain the increase of breakdown voltage. Then the fabricated devices process flow is demonstrated, the structures are performed, and the breakdown voltages increase with different n-type double diffusion (NDD) photoresistor (PR) size using the change of PR exposure dose are investigated. The measurement results show that maximum NDD PR size achieves BV improvement of 6.3%, and 5% increase of figure of merit (FOM) evaluation. Throughout the whole fabrication process, no additional mask and device area show the potential of cost effective with the proposed technique. Such devices with good off-state breakdown voltage and specific on-resistance are very competitive with similar technologies and show good promising in system on chip (SOC) applications. (C) 2012 The Japan Society of Applied Physics | en_US |
dc.language.iso | en_US | en_US |
dc.title | A Novel Cost Effective Double Reduced Surface Field Laterally Diffused Metal Oxide Semiconductor Design for Improving Off-State Breakdown Voltage | en_US |
dc.type | Article | en_US |
dc.identifier.doi | 04DP04 | en_US |
dc.identifier.journal | JAPANESE JOURNAL OF APPLIED PHYSICS | en_US |
dc.citation.volume | 51 | en_US |
dc.citation.issue | 4 | en_US |
dc.citation.epage | en_US | |
dc.contributor.department | 電子工程學系及電子研究所 | zh_TW |
dc.contributor.department | Department of Electronics Engineering and Institute of Electronics | en_US |
dc.identifier.wosnumber | WOS:000303928600103 | - |
dc.citation.woscount | 2 | - |
Appears in Collections: | Articles |
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