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dc.contributor.authorGUO, JIen_US
dc.contributor.authorCHEN, CSen_US
dc.contributor.authorJEN, CWen_US
dc.date.accessioned2014-12-08T15:03:08Z-
dc.date.available2014-12-08T15:03:08Z-
dc.date.issued1995-10-12en_US
dc.identifier.issn0013-5194en_US
dc.identifier.urihttp://dx.doi.org/10.1049/el:19951254en_US
dc.identifier.urihttp://hdl.handle.net/11536/1700-
dc.description.abstractA unified array design for the discrete cosine transform, discrete sine transform and their inverses based on a new general formulation is presented. The presented design provides the flexibility to adaptively select different types of transforms in transform coding according to the characteristics of images for minimising the bit rate as much as possible.en_US
dc.language.isoen_USen_US
dc.subjectDISCRETE COSINE TRANSFORMSen_US
dc.subjectSINE TRANSFORMSen_US
dc.subjectSYSTOLIC ARRAYSen_US
dc.titleUNIFIED ARRAY ARCHITECTURE FOR DISCRETE COSINE TRANSFORM, SINE TRANSFORM AND THEIR INVERSESen_US
dc.typeArticleen_US
dc.identifier.doi10.1049/el:19951254en_US
dc.identifier.journalELECTRONICS LETTERSen_US
dc.citation.volume31en_US
dc.citation.issue21en_US
dc.citation.spage1811en_US
dc.citation.epage1812en_US
dc.contributor.department電控工程研究所zh_TW
dc.contributor.departmentInstitute of Electrical and Control Engineeringen_US
dc.identifier.wosnumberWOS:A1995TA92000013-
dc.citation.woscount5-
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