標題: | A development and validation platform for communication SOC design |
作者: | Sun, YuChen Huang, ChingYao 電機學院 College of Electrical and Computer Engineering |
公開日期: | 2006 |
摘要: | This paper introduces a development and validation platform that combines hardware modeling and communication system simulation. This platform enables the use of a single platform for multiple purposes throughout a communication system design, including system simulation, software development and hardware modeling. Besides providing cycle accuracy hardware model, the platform is integrated with a multi-device simulation environment. Based on the platform, designers could complete protocol analysis and system simulation in a single stage. The platform is useful for the designs of communication components whose behaviors are highly coupled with transmission medium and other parallel components. In this paper, we will present the basic components and their design strategies. |
URI: | http://hdl.handle.net/11536/17448 |
ISBN: | 978-1-4244-0386-8 |
期刊: | 2006 IEEE Asia Pacific Conference on Circuits and Systems |
起始頁: | 101 |
結束頁: | 104 |
顯示於類別: | 會議論文 |