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dc.contributor.authorChiu, Chao-Chianen_US
dc.contributor.authorZan, Hsiao-Wenen_US
dc.contributor.authorShaw, Er-Kangen_US
dc.date.accessioned2014-12-08T15:25:30Z-
dc.date.available2014-12-08T15:25:30Z-
dc.date.issued2005en_US
dc.identifier.isbn978-957-28522-2-4en_US
dc.identifier.urihttp://hdl.handle.net/11536/17909-
dc.description.abstractThe conduction behavior of Poly-Si TFTs had been carefully studied by analyzing their activation energy under different bias condition. It is found that the trapping effects dominate grain boundary barrier under small drain bias, while the DIGBL effect was pronounced under high drain bias. Considering both the trapping effects and the DIGBL effects, a new activation energy model has been proposed and verified. The cut-off region activation energy of devices with or without LDD structure was also compared in this paper. The influence of gate bias on leakage current was examined by device simulation results.en_US
dc.language.isoen_USen_US
dc.titleAnalysis of thermal activation energy for poly-Si TFTsen_US
dc.typeProceedings Paperen_US
dc.identifier.journalIDMC 05: PROCEEDINGS OF THE INTERNATIONAL DISPLAY MANUFACTURING CONFERENCE 2005en_US
dc.citation.spage533en_US
dc.citation.epage536en_US
dc.contributor.department光電工程學系zh_TW
dc.contributor.departmentDepartment of Photonicsen_US
dc.identifier.wosnumberWOS:000259399200147-
Appears in Collections:Conferences Paper