A self-calibrate all-digital 3Gbps SATA driver design

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DC 欄位	值	語言
dc.contributor.author	Wang, Hsin-Wen	en_US
dc.contributor.author	Lu, Hung-Wen	en_US
dc.contributor.author	Su, Chau-Chin	en_US
dc.date.accessioned	2014-12-08T15:25:35Z	-
dc.date.available	2014-12-08T15:25:35Z	-
dc.date.issued	2005	en_US
dc.identifier.isbn	0-7803-9162-4	en_US
dc.identifier.uri	http://hdl.handle.net/11536/17990	-
dc.identifier.uri	http://dx.doi.org/10.1109/ASSCC.2005.251806	en_US
dc.description.abstract	This paper presents an all digital Low Voltage Differential Signal (LVDS) driver for Serial-ATA (SATA-II) with simultaneous switching noise (SSN) reduction capability. An auto calibration mechanism is included to deal with the process and environmental variation. The chip is implemented using TSMC 0.18-mu m 1P6M CMOS technology. The core area is 350050 mu m(2). The transmitter operates at 3 Gbps under a 1.8V power supply and consumes 11 mW of power.	en_US
dc.language.iso	en_US	en_US
dc.title	A self-calibrate all-digital 3Gbps SATA driver design	en_US
dc.type	Proceedings Paper	en_US
dc.identifier.doi	10.1109/ASSCC.2005.251806	en_US
dc.identifier.journal	2005 IEEE ASIAN SOLID-STATE CIRCUITS CONFERENCE, PROCEEDINGS OF TECHNICAL PAPERS	en_US
dc.citation.spage	57	en_US
dc.citation.epage	60	en_US
dc.contributor.department	電控工程研究所	zh_TW
dc.contributor.department	Institute of Electrical and Control Engineering	en_US
dc.identifier.wosnumber	WOS:000240872200015	-
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