標題: | Inversion MOS capacitance extraction for ultra-thin gate oxide using BSIM4 |
作者: | Lee, W Su, KW Chiang, CS Liu, S Su, P 電子工程學系及電子研究所 Department of Electronics Engineering and Institute of Electronics |
公開日期: | 2005 |
URI: | http://hdl.handle.net/11536/18052 |
ISBN: | 0-7803-9058-X |
期刊: | 2005 IEEE VLSI-TSA International Symposium on VLSI Technology (VLSI-TSA-TECH), Proceedings of Technical Papers |
起始頁: | 62 |
結束頁: | 63 |
Appears in Collections: | Conferences Paper |