標題: SHARED BUFFER ATM SWITCH WITH DOUBLY LINKED LISTS
作者: LIN, YF
SHUNG, CB
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
關鍵字: ATM;BROAD-BAND ISDN;FAULT TOLERANCE;SHARED BUFFER SWITCH
公開日期: 1-七月-1995
摘要: The shared buffer memory switch (SBMS) architecture was originally proposed as an effective approach to implement ATM switch fabrics. However, in this paper we find that if an error occurs in the address chain memory of one linked list which stores the address of the next cell in the shared buffer memory, the erroneous situation will spread over all linked lists in the SBMS in a short time. In order to prevent the fault spread phenomenon, we propose two doubly linked list based architectures to combat address chain failure; these are referred to as the Flush and In-Seq schemes. The first scheme flushes the remaining cells in the faulty queue but collect their addresses for later usage. The second scheme outputs the remaining cells in their correct sequence. From our simulation, if the error injection rate is low, the performance of the In-Seq scheme experiences slight degradation compared with the error-free situation.
URI: http://hdl.handle.net/11536/1816
ISSN: 1074-5351
期刊: INTERNATIONAL JOURNAL OF COMMUNICATION SYSTEMS
Volume: 8
Issue: 4
起始頁: 253
結束頁: 265
顯示於類別:期刊論文


文件中的檔案:

  1. A1995RT76600003.pdf

若為 zip 檔案,請下載檔案解壓縮後,用瀏覽器開啟資料夾中的 index.html 瀏覽全文。