標題: | SOC design integration by using automatic interconnection rectification |
作者: | Wang, CY Tung, SW Jou, JY 電子工程學系及電子研究所 Department of Electronics Engineering and Institute of Electronics |
公開日期: | 2003 |
摘要: | This paper presents an automatic interconnection rectification (AIR) technique to correct the misplaced interconnection occurred in the integration of a SoC design automatically. The experimental results show that the AIR can correct the misplaced interconnection and therefore accelerates the integration verification of a SoC design. |
URI: | http://hdl.handle.net/11536/18646 |
ISBN: | 0-7803-7761-3 |
期刊: | PROCEEDINGS OF THE 2003 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL IV: DIGITAL SIGNAL PROCESSING-COMPUTER AIDED NETWORK DESIGN-ADVANCED TECHNOLOGY |
起始頁: | 744 |
結束頁: | 747 |
Appears in Collections: | Conferences Paper |