標題: MODELING THE POSITIVE-FEEDBACK REGENERATIVE PROCESS OF CMOS LATCHUP BY A POSITIVE TRANSIENT POLE METHOD .1. THEORETICAL DERIVATION
作者: KER, MD
WU, CY
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
公開日期: 1-六月-1995
摘要: A novel method to characterize the mechanism of positive-feedback regeneration in a p-n-p-n structure during CMOS latchup transition is developed, It is based on the derived time-varying transient poles in large-signal base-emitter voltages of the lumped equivalent circuit of a p-n-p-n structure, Through calculating the time-varying transient poles during CMOS latchup transition, it is found that there exists a transient pole to change from negative to positive and then this pole changes to negative again, A p-n-p-n structure, which has a stronger positive-Feedback regeneration during turn-on transition, will lead to a larger positive transient pole, The time when the positive transient pole occurs during CMOS latchup transition is the time when the positive-feedback regeneration starts, By this positive transient pole, the positive-feedback regenerative process of CMOS latchup can he quantitatively characterized.
URI: http://hdl.handle.net/11536/1871
ISSN: 0018-9383
期刊: IEEE TRANSACTIONS ON ELECTRON DEVICES
Volume: 42
Issue: 6
起始頁: 1141
結束頁: 1148
顯示於類別:期刊論文


文件中的檔案:

  1. A1995QZ20000018.pdf

若為 zip 檔案,請下載檔案解壓縮後,用瀏覽器開啟資料夾中的 index.html 瀏覽全文。