標題: An automated IP synthesizer for limited-resource DWT processor
作者: Wei, TH
Huang, SR
Dung, LR
電控工程研究所
Institute of Electrical and Control Engineering
公開日期: 2002
摘要: This paper presents a systematic design methodology for 1-D/2-D DWT processor based on a novel limited-resource scheduling algorithm. Given a set of architecture constraints and DWT parameters, the scheduling algorithm can generate four scheduling matrices that drive the data path to perform the DWT computation. Based on the limited-resource scheduling algorithm an automated DWT processor synthesizer has been developed and generates constrained DWT processors in the form of silicon intelligent property (SIP). The DWT SIP can be embedded into a SOC or mapped to program codes for commercial off-the-shelf (COTS) DSP processors with programmable devices. As a result, it has been successfully proven that a variety of DWT SIPs can be efficiently realized by tuning the parameters and applied for signal processing applications.
URI: http://hdl.handle.net/11536/18816
ISBN: 0-7803-7402-9
ISSN: 1520-6149
期刊: 2002 IEEE INTERNATIONAL CONFERENCE ON ACOUSTICS, SPEECH, AND SIGNAL PROCESSING, VOLS I-IV, PROCEEDINGS
起始頁: 3172
結束頁: 3175
Appears in Collections:Conferences Paper