標題: ESD protection circuits with novel MOS-bounded diode structures
作者: Ker, MD
Chuang, CH
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
公開日期: 2002
摘要: On-chip ESD protection circuits realized with novel diode structures without the field-oxide boundary across the p/n junction are proposed. A PMOS (NMOS) is especially inserted into the diode structure to form the PMOS-bounded (NMOS-bounded) diode, which is used to block the field oxide isolation across the p/n junction in the diode structure. Without the field oxide boundary across the p/n junction of diode structure, the proposed PMOS-bounded and NMOS-bounded diodes can sustain much higher ESD stress, especially under the reverse-biased condition. Such PMOS-bounded and NMOS-bounded diodes are fully process-compatible to general CMOS processes without additional process modification or mask layers. The ESD protection circuits designed by such new diodes with different junction perimeters have been successfully verified in a 0.35-mum CMOS process.
URI: http://hdl.handle.net/11536/18922
ISBN: 0-7803-7448-7
期刊: 2002 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL V, PROCEEDINGS
起始頁: 533
結束頁: 536
Appears in Collections:Conferences Paper