| 標題: | Design on ESD protection circuit with very low and constant input capacitance |
| 作者: | Chen, TY Ker, MD 電子工程學系及電子研究所 Department of Electronics Engineering and Institute of Electronics |
| 公開日期: | 2001 |
| URI: | http://hdl.handle.net/11536/19100 |
| ISBN: | 0-7695-1026-4 |
| 期刊: | INTERNATIONAL SYMPOSIUM ON QUALITY ELECTRONIC DESIGN, PROCEEDINGS |
| 起始頁: | 247 |
| 結束頁: | 248 |
| 顯示於類別： | 會議論文 |
- ESD protection design on analog pin with very low input capacitance for high-frequency or current-mode applications / Ker, MD;Chen, TY;Wu, CY;Chang, HH
- Area-Efficient ESD-Transient Detection Circuit With Smaller Capacitance for On-Chip Power-Rail ESD Protection in CMOS ICs / Chen, Shih-Hung;Ker, Ming-Dou
- Design and analysis of on-chip ESD protection circuit with very low input capacitance for high-precision analog applications / Ker, MD;Chen, TY;Wu, CY
- Impedance-Isolation Technique for ESD Protection Design in RF Integrated Circuits / Ker, Ming-Dou;Hsiao, Yuan-Wen
Loading...