標題: | Universal switched-current integrator blocks for SI filter design |
作者: | Chan, JL Chung, SS 電子工程學系及電子研究所 Department of Electronics Engineering and Institute of Electronics |
公開日期: | 1999 |
摘要: | The switched-current (SI) circuit is a circuit technique which is able to realize analog sampled-data circuits with a standard CMOS technology. Among all the basic SI circuits, the memory cell circuit is the most primitive element. In this work, a practical SI memory cell which employs negative feedback circuitry and glitch reduction technique is first presented. Based on this basic cell, a universal SI integrator is then developed. General first and second order building blocks are subsequently developed for the cascade design of SI filters. These general building blocks can be used to generate all types of first and second order filters. To verify the accuracy of the SI circuits, test filters including a first order low-pass filter, a second order Chebyshev low-pass filter, and a fifth order Chebyshev low-pass filters have been designed and verified with HSPICE. The simulation results of the frequency response characteristics show good agreement with the theoretical results. |
URI: | http://hdl.handle.net/11536/19388 http://dx.doi.org/10.1109/ASPDAC.1999.760009 |
ISBN: | 0-7803-5012-X |
DOI: | 10.1109/ASPDAC.1999.760009 |
期刊: | PROCEEDINGS OF ASP-DAC '99: ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE 1999 |
起始頁: | 261 |
結束頁: | 264 |
顯示於類別: | 會議論文 |