標題: | A new IDDQ testing scheme employing charge storage BICS circuit for deep submicron CMOS ULSI |
作者: | Lu, CW Lee, CL Chen, JE Su, CC 電子工程學系及電子研究所 Department of Electronics Engineering and Institute of Electronics |
公開日期: | 1998 |
摘要: | In this work, a new IDDQ methodology, which is very suitable for testing deep submicron digital ULSI CMOS ICs, is proposed and demonstrated. It incorporates three new BICSs and has advantages of reduction in the circuit partitioning number, low input voltage, high resolution, low power supply voltage, and improved fault detectability and diagnosability. |
URI: | http://hdl.handle.net/11536/19586 |
ISBN: | 0-8186-9191-3 |
期刊: | 1998 IEEE INTERNATIONAL WORKSHOP ON IDDQ TESTING, PROCEEDINGS |
起始頁: | 54 |
結束頁: | 58 |
顯示於類別: | 會議論文 |