| 標題: | A numerical model for simulating MOSFET gate current degradation by considering the interface state generation |
| 作者: | Yih, CM Chung, SS Hsu, CCH 電子工程學系及電子研究所 Department of Electronics Engineering and Institute of Electronics |
| 公開日期: | 1996 |
| URI: | http://hdl.handle.net/11536/19842 |
| ISBN: | 0-7803-2745-4 |
| 期刊: | SISPAD '96 - 1996 INTERNATIONAL CONFERENCE ON SIMULATION OF SEMICONDUCTOR PROCESSES AND DEVICES |
| 起始頁: | 115 |
| 結束頁: | 116 |
| Appears in Collections: | Conferences Paper |
- A new approach to simulating n-MOSFET gate current degradation by including hot-electron induced oxide damage / Yih, CM;Cheng, SM;Chung, SS
- A new approach to simulating n-MOSFET gate current degradation by including hot-electron induced oxide damage / Yih, CM;Cheng, SM;Chung, SS
- A NEW GATE CURRENT SIMULATION TECHNIQUE CONSIDERING SI/SIO2 INTERFACE-TRAP GENERATION / WEN, KS;LI, HH;WU, CY
- EFFECTS OF HOT-CARRIER-INDUCED INTERFACE STATE GENERATION IN SUBMICRON LDD MOSFETS / WANG, TH;HUANG, CM;CHOU, PC;CHUNG, SSS;CHANG, TE
- A new approach for characterizing structure-dependent hot-carrier effects in drain-engineered MOSFET's / Chung, SS;Yang, JJ
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