標題: | Statistical device simulation of physical and electrical characteristic fluctuations in 16-nm-gate high-kappa/metal gate MOSFETs in the presence of random discrete dopants and random interface traps |
作者: | Li, Yiming Cheng, Hui-Wen 資訊工程學系 Department of Computer Science |
關鍵字: | Random discrete dopant;Random interface trap;DC/AC fluctuations;Random effect;High-kappa/metal gate;16-nm-gate;MOSFETs;3D device simulation |
公開日期: | 1-Nov-2012 |
摘要: | We estimate the effects of random discrete dopants (RDs) and random interface traps (ITs) on physical and electrical characteristic fluctuations of 16-nm-gate high-kappa/metal gate (HKMG) metal-oxide-semiconductor field effect transistors (MOSFETs). Two-dimensional (2D) random ITs at the hafnium oxide (HfO2)/silicon interface and 3D RDs inside the silicon channel of the 16-nm-gate HKMG MOSFETs are simultaneously incorporated into an experimentally validated 3D device simulation to quantify the RDs-and-ITs-fluctuated characteristics. The random effect of the combined RDs and ITs induces rather different fluctuation in the threshold voltage, the on-/off-state current, and the gate capacitance in the 16-nm-gate HKMG MOSFETs. The surface potential, DC and AC characteristic fluctuations are affected to different extents by the random combinatorial RDs and ITs. Nonlinearly correlated RDs and ITs violate the statistical assumption of independent identical distributions between the RDs- and ITs-induced random variables. Consequently, for the studied 16-nm-gate HKMG N-MOSFETs, the threshold voltage fluctuation induced by the combined RDs and ITs is 11% less than their statistical sum due to local interaction of surface potentials resulting from the RDs and ITs simultaneously. Similarly, it is about 8.9% for the P-MOSFET devices. Depending upon random position and number of the combined RDs and ITs, overestimation or underestimation between the statistical sum of variances and the 3D device simulation is also observed for the drain current and the gate capacitance. (c) 2012 Elsevier Ltd. All rights reserved. |
URI: | http://dx.doi.org/10.1016/j.sse.2012.05.017 http://hdl.handle.net/11536/20673 |
ISSN: | 0038-1101 |
DOI: | 10.1016/j.sse.2012.05.017 |
期刊: | SOLID-STATE ELECTRONICS |
Volume: | 77 |
Issue: | |
起始頁: | 12 |
結束頁: | 19 |
Appears in Collections: | Articles |
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