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dc.contributor.authorSung, W. -H.en_US
dc.contributor.authorLee, M. -C.en_US
dc.contributor.authorChung, C. -C.en_US
dc.contributor.authorLee, C. -Y.en_US
dc.date.accessioned2014-12-08T15:29:40Z-
dc.date.available2014-12-08T15:29:40Z-
dc.date.issued2012-11-08en_US
dc.identifier.issn0013-5194en_US
dc.identifier.urihttp://dx.doi.org/10.1049/el.2012.3016en_US
dc.identifier.urihttp://hdl.handle.net/11536/21307-
dc.description.abstractAn ultra-low voltage 22T implicit multiplexed differential (IMD) flip-flop (FF) is proposed. An implicit multiplexer is designed to simplify the differential FF complexity, while its control data path is able to enhance the FF noise immunity as well. So, the fully static IMD-FF with modified differential topology provides a sufficient noise margin under voltage scaling. On the other hand, the IMD-FF operation avoids considerable DC current dissipation to save active power and suppresses the idle leakage by stacked transistors. The post-layout simulation in 90 nm CMOS process with 400 mV supply voltage shows that the IMD-FF achieves 56% active power and 42.2% leakage power reduction. The tolerable noise energy is enhanced by 18.9% on average. Finally, this work provides 93% function yield rate under the effect of process-voltage-temperature variations and 40 pJ input noise energy.en_US
dc.language.isoen_USen_US
dc.titleUltra-low voltage implicit multiplexed differential flip-flop with enhanced noise immunityen_US
dc.typeArticleen_US
dc.identifier.doi10.1049/el.2012.3016en_US
dc.identifier.journalELECTRONICS LETTERSen_US
dc.citation.volume48en_US
dc.citation.issue23en_US
dc.citation.spage1452en_US
dc.citation.epage1453en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000314293800010-
dc.citation.woscount1-
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