標題: | A NEW FABRICATION TECHNOLOGY FOR FIELD-EMISSION TRIODES WITH EMITTER-GATE SEPARATION OF 0.18-MU-M |
作者: | WANG, CC LEE, WF KU, TK CHEN, MS FENG, MS HSIEH, IJ CHENG, HC 電子工程學系及電子研究所 Department of Electronics Engineering and Institute of Electronics |
關鍵字: | FIELD EMISSION;EMITTER-GATE SEPARATION;LPCVD;GATE OPENING;SHARPENING |
公開日期: | 1-一月-1995 |
摘要: | A new fabrication technology has been used for field-emission triodes with the emitter-gate separation as small as 0.18 mum to reduce the turn-on and anode voltages. The technology is based on the thermal oxidation of silicon and low-pressure chemical vapor deposition (LPCVD) of polycrystalline silicon, making the fabrication of a sub-half-micronmeter gate opening easy and reproducible. The entire process requires use of only one photolithography mask, and does not require advanced high-resolution photolithographic techniques. In this device, the oxidation process serves the three purposes of sharpening the emitters, defining the emitter-gate separation, and achieving a high-quality insulator. The finished devices have the emitter situated exactly at the center of the gate opening due to a self-alignment process. Furthermore, the LPCVD polysilicon film can form gate electrodes with a smooth edge and a small gate opening due to excellent step coverage. |
URI: | http://dx.doi.org/10.1143/JJAP.34.L85 http://hdl.handle.net/11536/2155 |
ISSN: | 0021-4922 |
DOI: | 10.1143/JJAP.34.L85 |
期刊: | JAPANESE JOURNAL OF APPLIED PHYSICS PART 2-LETTERS |
Volume: | 34 |
Issue: | 1A |
起始頁: | L85 |
結束頁: | L87 |
顯示於類別: | 期刊論文 |