標題: Device Design and Analysis of Logic Circuits and SRAMs for Germanium FinFETs on SOI and Bulk Substrates
作者: Hu, Vita Pi-Ho
Fan, Ming-Long
Su, Pin
Chuang, Ching-Te
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
關鍵字: FinFET;Germanium;Band-to-Band Tunneling;SRAM;Logic Circuit
公開日期: 2013
摘要: A comparative analysis of Germanium-on-Insulator FinFET (GeOl FinFET) and Germanium on bulk substrate FinFET (Ge bulk FinFET) at device and circuit level with respect to Si counterparts is presented. GeOI FinFET shows larger leakage current than Ge bulk FinFET due to the parasitic bipolar effect triggered by the band-to-band tunneling (BTBT) leakage. The effectiveness of different dual-Vt technology options including increasing channel doping, increasing gate length and drain-side underlap for leakage reduction is analyzed for GeOl and Ge bulk FinFET circuits and SRAMs. An optimum asymmetrie underlap design in SRAM using asymmetrie underlap pull-up and access transistors (PUAX-asym) is proposed. GeOl and Ge bulk FinFETs with asymmetrie underlap design show significant improvement in leakage-delay performance and stability in logic circuits and SRAM cells.
URI: http://hdl.handle.net/11536/22644
ISBN: 978-1-4673-4952-9
ISSN: 1948-3295
期刊: PROCEEDINGS OF THE FOURTEENTH INTERNATIONAL SYMPOSIUM ON QUALITY ELECTRONIC DESIGN (ISQED 2013)
起始頁: 347
結束頁: 352
Appears in Collections:Conferences Paper