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Advanced Metal-Gate/High-kappa CMOS with Small EOT and Better High Field Mobility

Abstract

Continuously down-scaling the operation voltage, saving energy, and maintaining high performance are the major challenge for CMOS device. Small 0.95 similar to 1.4 nm equivalent-oxide thickness (EOT) and 1.4 similar to 2.5X better mobility than universal SiO2/Si data are achieved in metal-gate/high-kappa/Ge CMOS at 1 MV/cm effective field (E-eff). These excellent performances were achieved by using interface engineering and novel process, to overcome the poor high-kappa/Ge interface reaction, low source-drain dopant activation, and n(+)/p ohmic contact. The all-Ge CMOS with measured higher electron and hole mobility has irreplaceable merits of much simpler process, lower cost, and potentially higher yield than the InGaAs-nMOS/Ge-pMOS platform for IC manufacture.

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