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dc.contributor.authorTrinh, Hai-Dangen_US
dc.contributor.authorChang, Edward Yien_US
dc.date.accessioned2014-12-08T15:33:16Z-
dc.date.available2014-12-08T15:33:16Z-
dc.date.issued2012en_US
dc.identifier.isbn978-1-4673-2475-5en_US
dc.identifier.urihttp://hdl.handle.net/11536/23153-
dc.description.abstractIn this paper, we present our studies on high k/InGaAs and high k/InSb structures, focusing on the interfaces, oxides qualities as well as down scaling the gate oxide. We indicate the free movement of Fermi level in both kinds of n- and p-InGaAs MOSCAPs. The effect of gases plasma treatments in the improvement of gate oxides as well as high k/InGaAs interface quality is also discussed. For high k/InSb structure, the effect of post deposition annealing temperatures on electrical properties of this structure is presented. Finally, we present our efforts on down scaling the equivalent oxide thickness of these structures into sub-nm size.en_US
dc.language.isoen_USen_US
dc.titleHigh k/III-V Structures: Interfaces, Oxides Quality and Down Scalingen_US
dc.typeProceedings Paperen_US
dc.identifier.journal2012 IEEE 11TH INTERNATIONAL CONFERENCE ON SOLID-STATE AND INTEGRATED CIRCUIT TECHNOLOGY (ICSICT-2012)en_US
dc.citation.spage856en_US
dc.citation.epage859en_US
dc.contributor.department材料科學與工程學系zh_TW
dc.contributor.departmentDepartment of Materials Science and Engineeringen_US
dc.identifier.wosnumberWOS:000319824700240-
Appears in Collections:Conferences Paper