標題: A 1-V 100-dB Dynamic Range 24.4-kHz Bandwidth Delta-Sigma Modulator
作者: Chang, Chia-Ling
Wu, Jieh-Tsorng
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
公開日期: 2013
摘要: A 2-1 MASH delta-sigma modulator (DSM) was fabricated using a 90nm CMOS technology. Operating at 6.25 MHz clock rate, this chip consumes 860 mu W under a 1 V supply. The over-sampling ratio is 128, and the signal-bandwidth is 24.4 kHz. This chip achieves a performance of 88 dB SNDR and 90 dB SNR. Its dynamic range is 100 dB. The chip area is 0.44 mm(2).
URI: http://hdl.handle.net/11536/24135
ISBN: 978-1-4673-5762-3; 978-1-4673-5760-9
ISSN: 0271-4302
期刊: 2013 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS)
起始頁: 813
結束頁: 816
Appears in Collections:Conferences Paper