標題: A Low Power 10Bit 500kS/s Delta-Modulated SAR ADC (DMSAR ADC) for Implantable Medical Devices
作者: Lyu, Yuan-Fu
Wu, Chung-Yu
Liu, Li-Chen
Chen, Wei-Ming
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
關鍵字: delta modulated SAR ADC;implantable
公開日期: 2013
摘要: An architecture of SAR ADC called the delta-modulated SAR ADC (DMSAR ADC) is proposed and designed for medical device applications. In the proposed DMSAR ADC, only the voltage difference between two successive samples is resolved to reduce the conversion steps and decrease the power consumption per channel up to 66%. The experimental chip is implemented in 0.18 mu m CMOS technology. At the digital supply voltage of 1.35V and Vref=1.00V, the measured power consumption per channel is 1.38 mu W (2.71 mu W) and the measured SNDR is 56.68dB (53.89 dB) for Fin=10Hz (7kHz). The ENOB is 9.12b and FoM is 39.54fJ/step.
URI: http://hdl.handle.net/11536/24144
ISBN: 978-1-4673-5762-3; 978-1-4673-5760-9
ISSN: 0271-4302
期刊: 2013 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS)
起始頁: 2046
結束頁: 2049
Appears in Collections:Conferences Paper