標題: | Low interface trap density Al2O3/In0.53Ga0.47As MOS capacitor fabricated on MOCVD-grown InGaAs epitaxial layer on Si substrate |
作者: | Lin, Yueh-Chin Huang, Mao-Lin Chen, Chen-Yu Chen, Meng-Ku Lin, Hung-Ta Tsai, Pang-Yan Lin, Chun-Hsiung Chang, Hui-Cheng Lee, Tze-Liang Lo, Chia-Chiung Jang, Syun-Ming Diaz, Carlos H. Hwang, He-Yong Sun, Yuan-Chen Chang, Edward Yi 材料科學與工程學系 電子工程學系及電子研究所 Department of Materials Science and Engineering Department of Electronics Engineering and Institute of Electronics |
公開日期: | 1-四月-2014 |
摘要: | A low interface trap density (D-it) Al2O3/In0.53Ga0.47As/Si MOS capacitor fabricated on an In0.53Ga0.47As heterostructure layer directly grown on a 300 mm on-axis Si(100) substrate by MOCVD with a very thin buffer layer is demonstrated. Compared with the MOS capacitors fabricated on the In0.53Ga0.47As layer grown on the lattice-matched InP substrate, the Al2O3/In0.53Ga0.47As MOS capacitors fabricated on the Si substrate exhibit excellent capacitance-voltage characteristics with a small frequency dispersion of approximately 2.5%/decade and a low interlace trap density D-it close to 5.5 x 10(11)cm(-2) eV(-1). The results indicate the potential of integrating high-mobility InGaAs-based materials on a 300 mm Si wafer for post-CMOS device application in the future. (C) 2014 The Japan Society of Applied Physics |
URI: | http://dx.doi.org/10.7567/APEX.7.041202 http://hdl.handle.net/11536/24487 |
ISSN: | 1882-0778 |
DOI: | 10.7567/APEX.7.041202 |
期刊: | APPLIED PHYSICS EXPRESS |
Volume: | 7 |
Issue: | 4 |
結束頁: | |
顯示於類別: | 期刊論文 |