Temperature-Dependent Instability of Bias Stress in InGaZnO Thin-Film Transistors

Abstract

The instability of the gate bias and drain bias stresses is observed at high temperature in amorphous InGaZnO thin-film transistors (a-IGZO TFTs). The transfer characteristics of a-IGZO TFTs at different temperatures are also investigated in this paper. The transfer curve exhibits an apparent subthreshold current stretchout phenomenon at high temperature. The stretchout phenomenon becomes more serious with the increase of the temperature. In addition, thermally induced holes are accumulated by the negative gate voltage and get trapped in the gate dielectric or at the dielectric/channel interface at high temperature. The negative threshold voltage shifts with stress time and this is because the trapped holes induce more electrons. For drain bias stress at high temperature, the transfer curve exhibits an apparent shift during drain bias stress at high temperature compared with the same at room temperature. At high temperature, thermally induced holes are trapped in the gate insulator, especially near the drain region. Capacitance-voltage measurements have been used to prove the nonuniform hole-trapping phenomenon. Furthermore, the simulation of the capacitance-voltage and current-voltage curves also have been applied to confirm the hole-trapping distribution. The obtained results clarify that the instability is caused by nonuniform hole-trapping phenomenon.