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dc.contributor.authorLuo, Tseng-Chinen_US
dc.contributor.authorChao, Mango C. -T.en_US
dc.contributor.authorTseng, Huan-Chien_US
dc.contributor.authorGoto, Masaharuen_US
dc.contributor.authorFisher, Philip A.en_US
dc.contributor.authorChang, Yuan-Yaoen_US
dc.contributor.authorChang, Chi-Minen_US
dc.contributor.authorTakao, Takayukien_US
dc.contributor.authorIwasaki, Katsuhitoen_US
dc.contributor.authorLee, Cheng Maoen_US
dc.date.accessioned2014-12-08T15:36:24Z-
dc.date.available2014-12-08T15:36:24Z-
dc.date.issued2014-05-01en_US
dc.identifier.issn1063-8210en_US
dc.identifier.urihttp://dx.doi.org/10.1109/TVLSI.2013.2265299en_US
dc.identifier.urihttp://hdl.handle.net/11536/24733-
dc.description.abstractAs process technologies continually advance, process variation has greatly increased and has gradually become one of the most critical factors for IC manufacturing. Furthermore, these increasingly complex processes continue to make greater use of stressors for mobility enhancement, thus requiring large volumes of data for extensive characterization of layoutdependent effects (LDE) for validation of both SPICE models and design for manufacturing. Transistor threshold voltage (V-t) is a commonly used parameter both for characterization during process development and for monitoring of volume manufacturing. To adequately quantify local process variation or LDE, V-t must be measured for a sufficiently large number of device-under- tests (DUTs) to obtain a statistically representative sample population. The number of V-t measurements required to obtain such a statistically significant result, however, requires extremely long testing time, especially for array-based test structure designs including thousands of DUTs. In this paper, we present a very fast threshold voltage measurement methodology using an operational amplifier-based source-measure unit test configuration, which greatly improves testing efficiency and accuracy, and is not sensitive to process variation. The proposed test methodology can improve V-t testing time by a factor of 5-10 relative to the commonly used binary-search algorithm, and by a factor of similar to 2 relative to an optimized interpolation algorithm, and achieves better accuracy (standard deviation of V-t = 0.15 mV, versus typical accuracy of similar to 0.5 mV for the two algorithms mentioned). Furthermore, the layout and configuration of conventional test structures need not be modified to adapt the proposed methodology. The measured results from the most advanced process technology nodes demonstrate the testing efficiency and accuracy of the proposed test structure in characterizing the large number of DUTs required for quantifying process variation or LDEs. Index Terms-Design for manufacturing (DFM), Thresholden_US
dc.language.isoen_USen_US
dc.subjectDesign for manufacturing (DFM)en_US
dc.subjectThreshold voltageen_US
dc.subjectVariationen_US
dc.titleFast Transistor Threshold Voltage Measurement Method for High-Speed, High-Accuracy Advanced Process Characterizationen_US
dc.typeArticleen_US
dc.identifier.doi10.1109/TVLSI.2013.2265299en_US
dc.identifier.journalIEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMSen_US
dc.citation.volume22en_US
dc.citation.issue5en_US
dc.citation.spage1138en_US
dc.citation.epage1149en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
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