Theoretical analysis of low phase noise design of CMOS VCO

doi:10.1109/LMWC.2004.840974

完整後設資料紀錄

DC 欄位	值	語言
dc.contributor.author	Kao, YH	en_US
dc.contributor.author	Hsu, MT	en_US
dc.date.accessioned	2014-12-08T15:37:03Z	-
dc.date.available	2014-12-08T15:37:03Z	-
dc.date.issued	2005-01-01	en_US
dc.identifier.issn	1531-1309	en_US
dc.identifier.uri	http://dx.doi.org/10.1109/LMWC.2004.840974	en_US
dc.identifier.uri	http://hdl.handle.net/11536/25444	-
dc.description.abstract	A theoretical analysis on low phase noise of voltage-controlled oscillators (VCOs) based on complementary cross-coupled LC VCO by 0.35-mum complementary metal oxide semiconductor technology is demonstrated. From the procedure of optimization steps, the excess noise factor of the amplifier coming from the active device has been determined. The proposed VCO operates at 2 GHz with phase noise of -116 dBc/Hz at offset frequency 600 kHz. The power consumption is 22.62 mW under 3 V bias with 9.1% frequency tuning. The achievement of low phase noise is also matched with prediction by formula in the frequency domain.	en_US
dc.language.iso	en_US	en_US
dc.subject	complementary metal oxide semiconductor (CMOS)	en_US
dc.subject	excess noise factor	en_US
dc.subject	phase noise	en_US
dc.subject	voltage-controlled oscillator (VCO)	en_US
dc.title	Theoretical analysis of low phase noise design of CMOS VCO	en_US
dc.type	Article	en_US
dc.identifier.doi	10.1109/LMWC.2004.840974	en_US
dc.identifier.journal	IEEE MICROWAVE AND WIRELESS COMPONENTS LETTERS	en_US
dc.citation.volume	15	en_US
dc.citation.issue	1	en_US
dc.citation.spage	33	en_US
dc.citation.epage	35	en_US
dc.contributor.department	傳播研究所	zh_TW
dc.contributor.department	Institute of Communication Studies	en_US
dc.identifier.wosnumber	WOS:000226296300012	-
dc.citation.woscount	2	-
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