標題: High-performance polycrystalline silicon thin-film transistor with multiple nanowire channels and lightly doped drain structure
作者: Wu, YC
Chang, TC
Chang, CY
Chen, CS
Tu, CH
Liu, PT
Zan, HW
Tai, YH
電子工程學系及電子研究所
光電工程學系
Department of Electronics Engineering and Institute of Electronics
Department of Photonics
公開日期: 10-五月-2004
摘要: This investigation examines polycrystalline silicon thin-film transistors (TFTs) with multiple nanowire channels and a lightly doped drain (LDD). A device with an LDD structure exhibits low leakage current because the lateral electrical field is reduced in the drain offset region. Additionally, multiple nanowire channels can generate fewer defects in the polysilicon grain boundary and have more efficient NH3 plasma passivation than single-channel TFTs, further reducing leakage current. They exhibit superior electrical characteristics to those of single-channel TFTs, such as a higher ON/OFF current ratio (>10(8)), a better subthreshold slope of 110 mV/decade, an absence of drain-induced barrier lowering, and suppressed kink-effect. Devices with the proposed TFTs are highly promising for use in active-matrix liquid-crystal display technologies. (C) 2004 American Institute of Physics.
URI: http://dx.doi.org/10.1063/1.1745104
http://hdl.handle.net/11536/26779
ISSN: 0003-6951
DOI: 10.1063/1.1745104
期刊: APPLIED PHYSICS LETTERS
Volume: 84
Issue: 19
起始頁: 3822
結束頁: 3824
顯示於類別:期刊論文


文件中的檔案:

  1. 000221210100034.pdf

若為 zip 檔案,請下載檔案解壓縮後,用瀏覽器開啟資料夾中的 index.html 瀏覽全文。