標題: Correlation between deep depletion and current-voltage saturation of SrTiO3 gate dielectric capacitor
作者: Liu, CY
Tseng, TY
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
關鍵字: films;electrical properties;dielectric properties;lifetime;capacitors;SrTiO3
公開日期: 2004
摘要: SrTiO3 (STO) gate dielectrics were deposited on p-type silicon substrate by radio-frequency (rf) magnetron sputtering in an Ar-O-2 and Ar-N-2 mixed ambient to form metal/insulator/semiconductor (MIS) capacitor to investigate capacitance-voltage (C-V) and current-voltage (I-V) characteristics. Schottky emission and Fowler-Nordheim tunneling mechanisms were responsible for the leakage current of nitrogen-grown STO-based MIS capacitors at the low and high electric field under accumulation condition, respectively, while the generation current dominated the leakage mechanism under the inversion condition due to the highly leaky insulator and the lack of electrons. The depletion width under the inversion condition would broaden to generate more electrons to maintain the leakage current and lead to capacitance decreasing under higher bias voltage, which is called as deep depletion. Therefore, the deep depletion and leakage current saturation under inversion condition would occur at the same time. The correlation between the deep depletion and the leakage mechanism in STO-based gate dielectric capacitor under inversion condition was used to extract the generation lifetime of silicon substrate. The normalized C-V measurements at 1 kHz under illumination were also made to examine the results of extracted generation lifetime. The extracted generation lifetime could provide a simple method to judge the quality of silicon substrates. (C) 2004 Elsevier Ltd and Techna Group S.r.1. All rights reserved.
URI: http://hdl.handle.net/11536/27204
http://dx.doi.org/10.1016/j.ceramint.2003.12.020
ISSN: 0272-8842
DOI: 10.1016/j.ceramint.2003.12.020
期刊: CERAMICS INTERNATIONAL
Volume: 30
Issue: 7
起始頁: 1101
結束頁: 1106
顯示於類別:會議論文


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