標題: | Dummy-gate structure to improve turn-on speed of silicon-controlled rectifier (SCR) device for effective electrostatic discharge (ESD) protection |
作者: | Ker, MD Hsu, KC 電機學院 College of Electrical and Computer Engineering |
關鍵字: | dummy gate;silicon controlled rectifier (SCR);substrate-triggered technique;electrostatic discharge (ESD);ESD protection |
公開日期: | 15-十一月-2003 |
摘要: | Turn-on speed is the main concern for on-chip electrostatic discharge (ESD) protection device, especially, in deep submicron complementary metal-oxide semiconductors (CMOS) processes with ultra-thin gate oxide. A novel dummy-gate-blocking silicon-controlled rectifier (SCR) device with substrate-triggered technique is proposed to improve the turn-on speed of SCR device for using in on-chip ESD protection circuit to effectively protect the much thinner gate oxide. From the experimental results, the switching voltage, turn-on resistance, and turn-on time of substrate-triggered SCR (STSCR) device with dummy-gate structure have been efficiently improved, as compared with the normal SCR with shallow trench isolation (STI) structure. |
URI: | http://dx.doi.org/10.1143/JJAP.42.L1366 http://hdl.handle.net/11536/27393 |
ISSN: | 0021-4922 |
DOI: | 10.1143/JJAP.42.L1366 |
期刊: | JAPANESE JOURNAL OF APPLIED PHYSICS PART 2-LETTERS |
Volume: | 42 |
Issue: | 11B |
起始頁: | L1366 |
結束頁: | L1368 |
顯示於類別: | 期刊論文 |